A SoC Logic Design Engineer Vacancy at Intel is liable for designing and enforcing System-on-Chip (SoC) solutions, integrating numerous IP blocks, and making sure of the most appropriate overall performance. They define micro-architectures, RTL layout, and verification while running on synthesis, timing closure, and formal verification. Engineers collaborate with move-useful businesses to optimize strength, ordinary normal performance, and place. Experience with AMBA protocols, NoC format, and peripheral interfaces at the side of USB and Ethernet is crucial. Strong knowledge in Verilog, VHDL, and scripting (Python/Perl) is important. They make contributions to design reviews, feasibility studies, and debugging, making sure inexperienced and excessive-usual average overall performance FPGA and ASIC-based SoC answers.
- Role: SoC Logic Design Engineer
- Company: Â Intel Corporation
- Work Type: Full–Time
- Education: No Degree Mentioned
SoC Logic Design Engineer Vacancy at Intel
At Intel, a SoC Logic Design Engineer plays a key role in growing modern SoC architectures for immoderate-standard overall performance computing and embedded applications. The artwork on RTL layout, micro-form definition, and integration of zero.33-birthday celebration IPs, ensuring gold preferred ordinary performance and strength overall performance. Responsibilities encompass timing analysis, synthesis, and verification at the same time as participating in verification, software application, and backend organizations. Engineers at Intel leverage superior way nodes and design methodologies to create organization-leading semiconductor products. Strong know-how of NoC, AMBA protocols, and scripting (Python, Perl) is needed. The function offers the opportunity to artwork on subsequent-era FPGA and ASIC SoCs.
About Company
Intel Corporation is an international chief in semiconductor innovation, stated for its advanced processors, SoCs, and AI-driven era. Founded in 1968, Intel has pioneered Moore’s Law, continuously pushing the bounds of computing general performance. Headquartered in Santa Clara, California, Intel develops high-normal performance CPUs, GPUs, FPGAs, and networking answers that electricity facts facilities, IoT, and purchaser electronics. The organization invests intently in R&D, the usage of improvements in synthetic intelligence, quantum computing, and self-sufficient systems. With a dedication to sustainability, safety, and innovation, Intel shapes the destiny of computing by manner of using delivering inexperienced and scalable hardware and software software answers globally.
Roles:
Microarchitecture and RTL Design – Develop microarchitecture and write RTL (Register Transfer Level) code for SoC subsystems the usage of Verilog/SystemVerilog.
Integration of IPs and Subsystems – Integrate 1/3-birthday celebration and custom-designed IPs (Intellectual Property) into the SoC layout.
Design Verification Collaboration – Work intently with the verification team to debug and validate the design using simulation and formal verification techniques.
Performance Optimization – Optimize common sense design for energy, overall performance, and region (PPA) trade-offs.
DFT (Design for Testability) Implementation – Implement test chains, boundary experiments, and integrated self-take a look at (BIST) functions for better manufacturability and testability.
Responsibilities:
RTL Coding and Synthesis – Write green RTL code, ensuring it meets synthesis and timing constraints.
Static Timing Analysis (STA) & Debugging – Perform timing closure and clear up setup/keep violations using gear like PrimeTime.
Power and Clock Management – Implement low-electricity strategies, including clock gating and electricity gating, for efficient SoC design.
Functional and Formal Verification – Support verification groups in writing test benches, debugging failures, and making sure of design correctness.
Collaboration with Cross-useful Teams – Work with architects, bodily layout, and firmware groups to ensure a successful chip tape-out.
Key Skills
RTL Design & Verification – Expertise in Verilog, VHDL, SystemVerilog, and UVM methodologies.
SoC Architecture & NoC Design – Proficiency in AMBA protocols (AXI, AHB, APB) and NoC interconnect.
Scripting & Automation – Experience with Python, Perl, and TCL for automation and layout flow ordinary overall performance.
Timing Analysis & Power Optimization – Knowledge of STA, synthesis, clock location crossing (CDC), and energy-aware format.
Peripheral Integration – Familiarity with USB, Ethernet, I3C, PCIe, and reminiscence controllers.
Benefits at IntelÂ
Competitive Compensation – Industry-main salaries, bonuses, and inventory alternatives.
Comprehensive Health Benefits – Medical, dental, imaginative and prescient, and properly-being packages.
Professional Growth – Access to current technology, training applications, and career development possibilities.
Work-Life Balance – Flexible artwork hours, a long way off artwork alternatives, and generous PTO hints.
Retirement & Financial Benefits – 401(good enough) plans, employee stock purchase applications, and lessons help.
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